Volgenau School of Engineering
George Mason University
George Mason University Mason
George Mason University

Computer Engineering

Computer engineers design new generations of computers, as well as embedded computing systems, such as those found in smartphones, cars, appliances, computer networks, smart factories, and the Internet of Things. Research in this area often involves complex trade-offs among various optimization criteria, such as speed, cost, power, energy, reliability, and security.

Our expertise includes:

Bio-Inspired and Cognitive Techniques for Defending Against Hardware Threats in Integrated Circuits 

The increasing complexity in the computer architecture design and the fabrication outsourcing to minimize the manufacturing and maintenance has led to a plethora of hardware threats with hardware trojans (HTs) and side-channel attacks being the primary hardware threats. In this project, we explore a multi-level defense to detect and defend against hardware trojans. First, from the architectural perspective, we investigate regular and irregular (virtual, physical, and hybrid) topologies for connecting different macroblocks inspired by microbial colonies and cortical interconnections to minimize the impact of HTs and isolate them. In addition, for determining the presence of HTs at node-level, we investigate the human immunology-inspired approaches to stimulate and trigger the HTs and deploy cognitive anomaly detection techniques to determine the presence of HTs. In terms of side-channel attacks, we investigate the impact of cognitively devised perturbations in the applications against physical and microarchitectural side-channel attacks. To perform this, we investigate adversarial machine learning techniques. Principal Investigator: Sai Manoj Pudukotai Dinakarrao.

Computer Architecture Security

Traditionally, security researchers and practitioners have viewed security as a software problem, originating in software and solved by software. Recently, the Spectre and Meltdown attacks have shown that hardware should also be considered when evaluating system security. Taking into account that many aspects of security are computationally expensive, hardware can play a role in promoting software security through computational support as well as the development of new abstractions that promote security. Under this general umbrella, we pursue three research directions that demonstrate how hardware can promote software security, how software can exploit hardware variabilities, and how we can design hardware that is secure against software-based attacks. Principal investigator: Khaled Khasawneh.

Internet of Things Circuit Locking, Obfuscation, and Authentication

By their nature, the Internet of Things (IoT) devices are small, often mobile, and powered by batteries or natural sources, such as sunlight. Their fast deployment, variety, sensitivity to cost, and a large number of vendors make them extremely vulnerable to attacks by individual hackers, organized crime, terrorist organizations, and rogue states. The nature of IoT devices makes them open to both physical attacks, involving close proximity of an attacker, who might even be an owner of the device, as well as remote attacks originating from another corner of the world. The consequences of such attacks may vary from mere inconvenience to the loss of life and property. This project addresses the development of a new hardware-security oriented architecture supported by an open-source compiler for protecting the hardware of IoT devices. The architecture protects the intellectual property (IP) during manufacturing and prevents reverse engineering and overproduction while allowing the manufacturer to securely test and register the hardware. Our research addresses many hardware security concerns and has the potential to significantly enhance the security capability of both today's and emerging IoT applications. Principal investigators: Avesta Sasan and Kris Gaj.

IoT Malware Epidemics and Smarter Confinement

The sheer volume of IoT networks being deployed today presents a major “attack surface” and poses significant security risks at a scale never encountered before. In other words, a single IoT device/node that gets infected with malware has the potential to spread the malicious activities across the network, eventually ceasing the network functionality or compromising the network. Only detecting and quarantining the malware in IoT networks does not guarantee to prevent malware propagation. Thus, we first investigate the propagation characteristics of malware on real-world networks through emulation platforms such as DETER and define the epidemic models. Further, this project involves the detection of malware at the node-level through lightweight anomaly detection techniques utilizing the device and network characteristics. Besides, we investigate stochastic control and cognitive techniques, including graph learning, to predict the best possible network topology that minimizes the malware spread with minimal impact on the network performance. Principal Investigator: Sai Manoj Pudukotai Dinakarrao.

Lightweight Cryptography

Traditional modern cryptography has been developed targeting primarily personal computers and servers, enhanced if needed with hardware accelerators. This paradigm no longer applies in the era of the Internet of Things (IoT). The growing number of devices that generate information and communicate with each other has little to do with computers as we know them. Examples include smart home devices, radio-frequency identification tags (RFIDs), health monitoring and emergency notification systems, environmental monitoring devices, smart grid, and countless other applications. In a substantial subset of these applications, the constrained nature of the communicating devices, in terms of their cost, area, memory usage, peak power, or total energy required, prohibits the use of traditional cryptographic algorithms. Lightweight cryptography is a subset of cryptography targeting specifically such constrained environments. In this project, we focus on the evaluation of the most promising candidates for new lightweight cryptography standards from the point of view of their efficiency in hardware and embedded systems. Principal investigators: Kris Gaj and Jens-Peter Kaps.

Post-Quantum Cryptography in Hardware and Embedded Systems

After reaching sufficient maturity and scalability, quantum computers may easily break almost all current standards in the area of public-key cryptography, including algorithms protecting the majority of the Internet traffic, such as RSA and elliptic curve cryptography. The goal of this project is to support the National Institute of Standards and Technology in its effort to develop a new generation of public-key cryptographic standards, resistant against quantum computers. The corresponding class of algorithms is referred to as post-quantum cryptography (PQC). To date, the assessment of candidates for new PQC standards has focused primarily on their security and software efficiency. Relatively little progress has been made so far to understand the true potential of these algorithms for efficient hardware and embedded systems implementations, and in particular, realizations resistant against side-channel attacks (SCA). The objective of this project is to set the foundation for the early, systematic, and comprehensive study of the hardware and software efficiency of the most promising PQC candidates. This project, as a part of the much bigger effort by the entire cryptographic community, gives a unique opportunity to influence the choice of future cryptographic standards, which are likely to be developed and deployed within the next decade and remain in use for the significant portion (if not the rest) of the 21st century. Principal investigators: Kris Gaj and Jens-Peter Kaps.

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